AMD Introduces Modern Data Centre CPU

AMD Introduces Modern Data Centre CPU

AMD has announced the general availability of the world’s first data centre CPU utilizing 3D die stacking technology.


It concerns the third generation of EPYC processors with AMD 3D V-Cache, which was previously known under Milan-X’s code name.

Built on the Zen 3 core architecture, the processors are the latest addition to AMD’s third-generation EPYC CPU family.

Compared to non-stacked EPYC processors of the same generation, they can deliver up to 66 percent performance improvement, according to the manufacturer, across a variety of technical computing workloads. This includes computational fluid dynamics (CFD), finite element analysis (FEA), electronic design automation (EDA) and structural analysis.

The new processors feature the largest L3 cache in the industry. They also offer the same socket, software compatibility and modern security features as previous third-generation EPYC CPUs.

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